Chip Fabrication
Chip Tapeout & MPW Shuttle Booking
Reserve your die space on an upcoming multi-project wafer shuttle run. Compare foundry nodes, lead times, and cadence, then submit a structured tapeout request through the booking flow.
MPW Shuttle Booking
Browse live shuttle runs across partner foundries, check die area availability, and submit your tapeout package for review.
Upcoming Shuttle Runs
| Node | Foundry Route | Cadence | Lead Time | Status | |
|---|---|---|---|---|---|
| 180nm | SCL Mohali / Domestic MPW | Quarterly | 12–16 weeks | Open | Reserve → |
| 130nm – 90nm | Partner Foundry (Asia-Pac MPW) | Bi-monthly | 10–14 weeks | Open | Reserve → |
| 65nm – 40nm | Global Foundry Consortium | Monthly | 8–12 weeks | Waitlist | Reserve → |
| 28nm | Global Foundry Consortium | Scheduled | 16–20 weeks | Enquire | Reserve → |
Tapeout Submission Requirements
- ✓GDSII or OASIS layout, DRC/LVS clean against target PDK
- ✓Signed foundry NDA / MPW participation agreement
- ✓Die area reservation within shuttle floorplan allocation
- ✓Pad frame and ESD compliance per foundry I/O library
- ✓Final tapeout package: GDS, LEF/DEF, timing reports, doc sign-off
Need help preparing your tapeout package or estimating fab economics for a shuttle run? Learning module M15 — Semiconductor Fab Economics & DES Simulation covers scenario-based costing you can apply before you book. Browse learning modules →